circuit-optimizer
Quantum circuit optimization skill for gate reduction, depth minimization, and hardware-aware compilation
Best use case
circuit-optimizer is best used when you need a repeatable AI agent workflow instead of a one-off prompt.
Quantum circuit optimization skill for gate reduction, depth minimization, and hardware-aware compilation
Teams using circuit-optimizer should expect a more consistent output, faster repeated execution, less prompt rewriting.
When to use this skill
- You want a reusable workflow that can be run more than once with consistent structure.
When not to use this skill
- You only need a quick one-off answer and do not need a reusable workflow.
- You cannot install or maintain the underlying files, dependencies, or repository context.
Installation
Claude Code / Cursor / Codex
Manual Installation
- Download SKILL.md from GitHub
- Place it in
.claude/skills/circuit-optimizer/SKILL.mdinside your project - Restart your AI agent — it will auto-discover the skill
How circuit-optimizer Compares
| Feature / Agent | circuit-optimizer | Standard Approach |
|---|---|---|
| Platform Support | Not specified | Limited / Varies |
| Context Awareness | High | Baseline |
| Installation Complexity | Unknown | N/A |
Frequently Asked Questions
What does this skill do?
Quantum circuit optimization skill for gate reduction, depth minimization, and hardware-aware compilation
Where can I find the source code?
You can find the source code on GitHub using the link provided at the top of the page.
SKILL.md Source
# Circuit Optimizer ## Purpose Provides expert guidance on quantum circuit optimization techniques for reducing gate count, minimizing depth, and adapting circuits to hardware constraints. ## Capabilities - Circuit depth reduction algorithms - Gate cancellation and merging - Peephole optimization - Template matching optimization - Commutation analysis - Hardware topology-aware routing - Two-qubit gate minimization - Compilation pass orchestration ## Usage Guidelines 1. **Analysis**: Profile circuit for optimization opportunities (gate counts, depth, connectivity) 2. **Gate Reduction**: Apply cancellation and merging rules for equivalent gates 3. **Depth Optimization**: Parallelize independent operations where topology allows 4. **Hardware Mapping**: Route circuits to respect hardware connectivity constraints 5. **Verification**: Validate circuit equivalence after optimization ## Tools/Libraries - Qiskit transpiler - pytket (t|ket>) - PyZX - Cirq optimizers - BQSKit
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